gate (Total 90530 Patents Found)

Gate (90530 Patents Found)
Disclosed is an integrated circuit process which includes forming two types of active devices: a first set of IGFETs has silicide gates, and the second set has TiN gates. The same TiN thin film layer also provides local interconnect. Optionally the TiN-gate devices may be used for high-voltage devices and the silicide-...
A lined gate valve having a seat proportioned such that the ratio of the unit bearing stress to the unit shear stress is substantially 0.68. In one form of the valve, the seat comprises a plastic ring having an embedded metal band. The seat is removable and is held in place by the end pressure of a pipe flange. The sea...
A variable voltage is provided to gates of isolation transistors in DRAM devices between digit lines containing many storage cells and a sense amplifier. The gate of the isolation transistor is provided a voltage pumped higher than the supply voltage during read time to ensure that a small differential voltage on the d...
A split gate electrode MOS FET device includes a tunnel oxide layer formed over a semiconductor substrate. Over the tunnel oxide layer, a doped first polysilicon layer is formed with a top surface. A native oxide which forms over the doped first polysilicon layer may have been removed as an option. On the top surface o...
A method of patterning a gate electrode layer having an underlying high-k dielectric layer comprising the following sequential steps. A substrate is provided. A high-k dielectric layer is formed over the substrate. A gate electrode layer is formed over the high-k dielectric layer. The gate electrode layer is patterned ...
An apparatus is disclosed for producing metal powder having a molten metal holding vessel with a generally cylindrical shaped bottom portion, a molten metal discharging runner located at the bottom portion of the holding vessel, a spraying chamber connected at a lower end of the discharging runner, a first induction he...
An integrated circuit and a method of making a transistor thereof are provided. The method includes the steps of forming a first stack on the substrate and a second stack on substrate in spaced-apart relation to the first stack, where the first stack has a first layer and first and second spacers adjacent to the first ...
A gate electrode is made up of a lower electrode of polysilicon and an upper electrode including a low-resistance film. A nitride sidewall is formed to cover at least the side faces of an insulator cap and the upper electrode. A pad oxide film is formed to cover at least part of the side faces of the lower electrode an...
A flat panel display includes a substrate, a front glass, a cathode, a gate electrode, a plurality of front ribs, a phosphor film and a metal-backed film, and a gate rib. The front glass is arranged to oppose the substrate and forms a vacuum envelope together with the substrate. The front glass is transparent at least ...
A trench device and method for fabricating same are provided. The trench device has a collar with a first portion that is doped and a second portion that is undoped. Fabrication of the partially doped collar can be done by deposition of a doped insulator in the trench, removal of a portion of the doped deposition, depo...
A radio-frequency amplifier is provided. The radio-frequency amplifier includes a transistor having an input terminal, an output terminal, a control terminal, and a transconductance g m . A series-connected feed-through resistance R f and feed-through capacitance C f is connected in parallel with the input terminal a...
A compact, inexpensive static induction thyristor (SIThy) which is less likely to be broken down at a high voltage rise-up rate during operation and which is used in a high-voltage pulse generator capable of generating a high-voltage short pulse is provided. Thicknesses and impurity concentrations of a base region and ...
A method for forming a gate stack which minimizes or eliminates damage to the gate dielectric layer and/or silicon substrate during the gate stack formation by the reduction of the temperature during formation. The temperature reduction prevents the formation of silicon clusters within the metallic silicide film in the...
The invention is aimed at providing a gate antenna device which expands the distance and range of communication with an IC-integrated medium and improves the accuracy of communication while suppressing power consumption and leakage electric fields. A gate antenna device having a plurality of loop antennas which supplie...
An active electronic device has drain and source electrodes that make ohmic conduct with a layer of a semiconductor. The semiconductor layer may be a thin layer of an organic or amorphous semiconductor. The drain and source electrodes are on a first face of the layer of semiconductor at locations that are spaced apart ...
A method of producing a semiconducting device is provided that in one embodiment includes providing a semiconducting device including a gate structure atop a substrate, the gate structure including a dual gate conductor including an upper gate conductor and a lower gate conductor, wherein at least the lower gate conduc...
A transistor ( 10 ) is formed on a semiconductor substrate ( 12 ) with a first surface ( 19 ) for forming a channel ( 40 ). A gate dielectric ( 22 ) has a first thickness overlying a first portion of the channel, and a dielectric film ( 20 ) overlies a second portion of the channel and has a second thickness greater th...
Various embodiments of the invention relate to a PMOS device having a transistor channel of silicon germanium material on a substrate, a gate dielectric having a dielectric constant greater than that of silicon dioxide on the channel, a gate electrode conductor material having a work function in a range between a valen...
Provided is a bottom gate type thin film transistor including on a substrate ( 1 ) a gate electrode ( 2 ), a first insulating film ( 3 ) as a gate insulating film, an oxide semiconductor layer ( 4 ) as a channel layer, a second insulating film ( 5 ) as a protective layer, a source electrode ( 6 ), and a drain electrode...
A method for processing semiconductor devices includes providing a semiconductor substrate. The method includes forming a pad oxide layer overlying the substrate and forming a silicon nitride layer overlying the pad oxide layer. The method includes forming a trench region extending through an entirety of a portion of t...
A method of manufacturing an embedded flash memory device is provided. A pair of gate stacks are formed spaced over a semiconductor substrate, and including floating gates and control gates over the floating gates. A common gate layer is formed over the gate stacks and the semiconductor substrate, and lining sidewalls ...
A transistor device includes a gate structure positioned above a semiconductor substrate and spaced-apart sidewall spacers positioned above the substrate and adjacent sidewalls of the gate structure, wherein an internal sidewall surface of each of the spaced-apart sidewall spacers has a stepped cross-sectional configur...
There are disclosed a gate driving circuit and a display device, which include: M areas, each area includes K sub driving circuit, and the k-th sub driving circuit includes: first and second row driving circuits, both of which include: a gate line grating control module ( 11 ) including a row control signal input termi...
Display driver circuitry may load data into an array of pixels via data lines. The display driver circuitry may supply control signals including scan signals to the pixels via control lines. Each pixel may have transistors and capacitor circuitry for controlling the emission of light from a light-emitting diode. A driv...
The present invention discloses a shift register unit, employed for providing a gate voltage to a nth pixel of a liquid crystal display, and comprising first to third N-type transistors, and gates of the first, second N-type transistors respectively receive gate voltages of n−2th, n−2th pixels, and first end of the...
A complementary metal-oxide-semiconductor (CMOS) integrated circuit structure, and method of fabricating the same according to a replacement metal gate process. P-channel and n-channel MOS transistors are formed with high-k gate dielectric material that differ from one another in composition or thickness, and with inte...